关于C语言分割、修改、保存文件的
用到MATLAB 和C语言的混编 ，这里只需要用C的 由ORCAD生成的.out文件（可以用记事本打开） 内容 如下：
**** 07/13/14 08:52:48 *********** Evaluation PSpice (Nov 1999) **************
** Profile: "SCHEMATIC1-my" [ E:\pspice2\my-SCHEMATIC1-my.sim ]
**** CIRCUIT DESCRIPTION
******************************************************************************
** Creating circuit file "my-SCHEMATIC1-my.sim.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
*Libraries:
* Local Libraries :
* From [PSPICE NETLIST] section of pspiceev.ini file:
.lib "nom.lib"
*Analysis directives:
.OP
.PROBE
.INC "
**** INCLUDING ****
* source MY
X_X1A $D_HI N00117 $G_DPWR $G_DGND 7404 PARAMS:
+ IO_LEVEL=0 MNTYMXDLY=0
X_X2A $D_LO N00127 $G_DPWR $G_DGND 7404 PARAMS:
+ IO_LEVEL=0 MNTYMXDLY=0
X_U1A N00117 $D_LO N00149 $G_DPWR $G_DGND 7402 PARAMS:
+ IO_LEVEL=0 MNTYMXDLY=0
X_U3A $D_HI N00127 N00140 $G_DPWR $G_DGND 7402 PARAMS:
+ IO_LEVEL=0 MNTYMXDLY=0
.PRINT TRAN V([N00127])
X_U4A N00149 N00140 N00167 $G_DPWR $G_DGND 7402 PARAMS:
+ IO_LEVEL=0 MNTYMXDLY=0
.PRINT TRAN V([N00149])
.PRINT TRAN V([N00140])
.PRINT TRAN V([N00167])
.PRINT TRAN V([N00117])
**** RESUMING my-SCHEMATIC1-my.sim.cir ****
.INC "my-SCHEMATIC1.als"
**** INCLUDING my-SCHEMATIC1.als ****
.ALIASES
X_X1A X1A(A=$D_HI Y=N00117 VCC=$G_DPWR GND=$G_DGND )
X_X2A X2A(A=$D_LO Y=N00127 VCC=$G_DPWR GND=$G_DGND )
X_U1A U1A(A=N00117 B=$D_LO Y=N00149 VCC=$G_DPWR GND=$G_DGND )
X_U3A U3A(A=$D_HI B=N00127 Y=N00140 VCC=$G_DPWR GND=$G_DGND )
X_U4A U4A(A=N00149 B=N00140 Y=N00167 VCC=$G_DPWR GND=$G_DGND )
_ _(GND=GND)
_ _(VCC=VCC)
.ENDALIASES
**** RESUMING my-SCHEMATIC1-my.sim.cir ****
.END
**** Generated AtoD and DtoA Interfaces ***
*
* Analog/Digital interface for node N00127
*
* Moving X_U3A.U1:IN2 from analog node N00127 to new digital node N00127$AtoD
X$N00127_AtoD1
+ N00127
+ N00127$AtoD
+ $G_DPWR
+ $G_DGND
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_X2A.U1:OUT1 from analog node N00127 to new digital node N00127$DtoA
X$N00127_DtoA1
+ N00127$DtoA
+ N00127
+ $G_DPWR
+ $G_DGND
+ DtoA_STD
+ PARAMS: DRVH= 96.4 DRVL= 104 CAPACITANCE= 0
* Analog/Digital interface for node N00149
* Moving X_U4A.U1:IN1 from analog node N00149 to new digital node N00149$AtoD
X$N00149_AtoD1
+ N00149
+ N00149$AtoD
+ $G_DPWR
+ $G_DGND
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U1A.U1:OUT1 from analog node N00149 to new digital node N00149$DtoA
X$N00149_DtoA1
+ N00149$DtoA
+ N00149
+ $G_DPWR
+ $G_DGND
+ DtoA_STD
+ PARAMS: DRVH= 96.4 DRVL= 104 CAPACITANCE= 0
* Analog/Digital interface for node N00140
* Moving X_U4A.U1:IN2 from analog node N00140 to new digital node N00140$AtoD
X$N00140_AtoD1
+ N00140
+ N00140$AtoD
+ $G_DPWR
+ $G_DGND
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_U3A.U1:OUT1 from analog node N00140 to new digital node N00140$DtoA
X$N00140_DtoA1
+ N00140$DtoA
+ N00140
+ $G_DPWR
+ $G_DGND
+ DtoA_STD
+ PARAMS: DRVH= 96.4 DRVL= 104 CAPACITANCE= 0
* Analog/Digital interface for node N00167
* Moving X_U4A.U1:OUT1 from analog node N00167 to new digital node N00167$DtoA
X$N00167_DtoA1
+ N00167$DtoA
+ N00167
+ $G_DPWR
+ $G_DGND
+ DtoA_STD
+ PARAMS: DRVH= 96.4 DRVL= 104 CAPACITANCE= 0
* Analog/Digital interface for node N00117
* Moving X_U1A.U1:IN1 from analog node N00117 to new digital node N00117$AtoD
X$N00117_AtoD1
+ N00117
+ N00117$AtoD
+ $G_DPWR
+ $G_DGND
+ AtoD_STD
+ PARAMS: CAPACITANCE= 0
* Moving X_X1A.U1:OUT1 from analog node N00117 to new digital node N00117$DtoA
X$N00117_DtoA1
+ N00117$DtoA
+ N00117
+ $G_DPWR
+ $G_DGND
+ DtoA_STD
+ PARAMS: DRVH= 96.4 DRVL= 104 CAPACITANCE= 0
* Analog/Digital interface power supply subcircuits
X$DIGIFPWR 0 DIGIFPWR
**** 07/13/14 08:52:48 *********** Evaluation PSpice (Nov 1999) **************
** Profile: "SCHEMATIC1-my" [ E:\pspice2\my-SCHEMATIC1-my.sim ]
**** Diode MODEL PARAMETERS
*****************************************************************************
D74CLMP D74
IS 1.000000E-15 100.000000E-18
RS 2 25
CJO 2.000000E-12 2.000000E-12
**** 07/13/14 08:52:48 *********** Evaluation PSpice (Nov 1999) **************
** Profile: "SCHEMATIC1-my" [ E:\pspice2\my-SCHEMATIC1-my.sim ]
**** BJT MODEL PARAMETERS
******************************************************************************
Q74
NPN
IS 100.000000E-18
BF 49
NF 1
ISE 100.000000E-18
BR .03
NR 1
ISC 400.000000E-18
RB 50
RC 20
CJE 1.000000E-12
VJE .9
MJE .5
CJC 500.000000E-15
VJC .8
CJS 3.000000E-12
VJS .7
MJS .33
TF 200.000000E-12
TR 10.000000E-09
CN 2.42
D .87
**** 07/13/14 08:52:48 *********** Evaluation PSpice (Nov 1999) **************
** Profile: "SCHEMATIC1-my" [ E:\pspice2\my-SCHEMATIC1-my.sim ]
**** Digital Input MODEL PARAMETERS
******************************************************************************
DIN74
FILE DSO_DTOA
FORMAT 6
TIMESTEP 100.000000E-12
S0NAME 0
S0TSW 3.500000E-09
S0RLO 7.13
S0RHI 389
S1NAME 1
S1TSW 5.500000E-09
S1RLO 467
S1RHI 200
S2NAME X
S2TSW 3.500000E-09
S2RLO 42.9
S2RHI 116
S3NAME R
S3TSW 3.500000E-09
S3RLO 42.9
S3RHI 116
S4NAME F
S4TSW 3.500000E-09
S4RLO 42.9
S4RHI 116
S5NAME Z
S5TSW 3.500000E-09
S5RLO 200.000000E+03
S5RHI 200.000000E+03
**** 07/13/14 08:52:48 *********** Evaluation PSpice (Nov 1999) **************
** Profile: "SCHEMATIC1-my" [ E:\pspice2\my-SCHEMATIC1-my.sim ]
**** Digital Output MODEL PARAMETERS
******************************************************************************
DO74
FILE DSO_ATOD
FORMAT 6
CHGONLY 1
TIMESTEP 100.000000E-12
S0NAME X
S0VHI 2
S0VLO .8
S1NAME 0
S1VHI .8
S1VLO -1.5
S2NAME R
S2VHI 1.4
S2VLO .8
S3NAME R
S3VHI 2
S3VLO 1.3
S4NAME X
S4VHI 2
S4VLO .8
S5NAME 1
S5VHI 7
S5VLO 2
S6NAME F
S6VHI 2
S6VLO 1.3
S7NAME F
S7VHI 1.4
S7VLO .8
**** 07/13/14 08:52:48 *********** Evaluation PSpice (Nov 1999) **************
** Profile: "SCHEMATIC1-my" [ E:\pspice2\my-SCHEMATIC1-my.sim ]
**** Digital Gate MODEL PARAMETERS
******************************************************************************
D_04 D_02
TPLHMN 4.800000E-09 4.800000E-09
TPLHTY 12.000000E-09 12.000000E-09
TPLHMX 22.000000E-09 22.000000E-09
TPHLMN 3.200000E-09 3.200000E-09
TPHLTY 8.000000E-09 8.000000E-09
TPHLMX 15.000000E-09 15.000000E-09
NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE
(N00117) .0971 (N00127) 3.4979 (N00140) .0971 (N00149) 3.4979
(N00167) .0900 ($G_DGND) 0.0000 ($G_DPWR) 5.0000
(X$N00117_AtoD1.1) .1886 (X$N00117_AtoD1.2) .0943
(X$N00117_AtoD1.3) .9230 (X$N00127_AtoD1.1) 1.5648
(X$N00127_AtoD1.2) .7824 (X$N00127_AtoD1.3) 2.2862
(X$N00140_AtoD1.1) .1886 (X$N00140_AtoD1.2) .0943
(X$N00140_AtoD1.3) .9230 (X$N00149_AtoD1.1) 1.5648
(X$N00149_AtoD1.2) .7824 (X$N00149_AtoD1.3) 2.2862
DGTL NODE : STATE DGTL NODE : STATE DGTL NODE : STATE DGTL NODE : STATE
(N00149$DtoA) : 1 (N00127$DtoA) : 1 (N00149$AtoD) : 1 ( $D_HI) : 1
(N00127$AtoD) : 1 (N00167$DtoA) : 0 (N00117$DtoA) : 0 ( $D_LO) : 0
(N00140$DtoA) : 0 (N00117$AtoD) : 0 (N00140$AtoD) : 0
大概就是这样的吧 我需要把最后这 NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE
(N00117) .0971 (N00127) 3.4979 (N00140) .0971 (N00149) 3.4979
(N00167) .0900 ($G_DGND) 0.0000 ($G_DPWR) 5.0000 之中的N00117到.900数据取出来 保存到一个新的1.txt中 并且按顺序把N00117改成1 N00127改成2 依次类推
这段程序行数不固定 可能只能判断关键字来查找到 求大神 帮忙写段程序 有大神的话也可以详细QQ聊 急求啊 498755303
1.zip